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https://codeberg.org/scip/attinycore-makefile-tests.git
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got it to work with sleep, vcc, bme measurement and radio out
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@@ -55,6 +55,21 @@
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delay(10); \
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SPCR = (1<<SPE)
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// go into sleep mode, keep SPI running
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// disable ADC
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// wait a little for the last serial out (if any) to flush
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// set all bits in power reduction register to one (shutdown everything)
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// actually sleep
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// wake up after WDT timeout
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// wait a little
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#define sleep_enter_keep_spi() \
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adc_disable(); \
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delay(10); \
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PRR = 0xFF; \
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sleep_mode(); \
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PRR = 0x00; \
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delay(10);
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// nothing extra to do on wake up, just wake up
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#define sleep_vect() ISR(WDT_vect){}
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