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https://codeberg.org/scip/attinycore-makefile-tests.git
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@@ -33,21 +33,26 @@
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ACSR1A |= _BV(ACD1); \
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CCP = 0xD8; \
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WDTCSR = _BV(WDIE) | SLEEP_DURATION_BITS; \
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CCP = 0xD8; \
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CLKPR = (_BV(CLKPS0) | _BV(CLKPS1));
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// FIXME: check!
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// PRR = 0xFF;
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// go into sleep mode and wake up after wtd timeout
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// also disable SPI
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// go into sleep mode
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// disable ADC
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// wait a little for the last serial out (if any) to flush
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// disable SPI
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// set all bits in power reduction register to one (shutdown everything)
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// actually sleep
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// wake up after WDT timeout
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// wait a little
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// re-enable SPI
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#define sleep_enter() \
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adc_disable(); \
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delay(10); \
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SPCR &= ~_BV(SPE); \
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sleep_enable(); \
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PRR = 0xFF; \
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sleep_mode(); \
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sleep_disable(); \
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PRR = 0x00; \
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delay(10); \
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SPCR = (1<<SPE)
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// nothing extra to do on wake up, just wake up
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