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https://codeberg.org/scip/attinycore-makefile-tests.git
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78 lines
2.0 KiB
C
78 lines
2.0 KiB
C
/*
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Macros for easier sleep mode management
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For Attiny841 only
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*/
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#include <avr/sleep.h>
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#include <avr/wdt.h>
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#include <avr/interrupt.h>
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#include "841vcc.h"
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#ifndef SLEEPMODE_8441_H
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#define SLEEPMODE_8441_H
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#ifndef SLEEPMODE
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#define SLEEPMODE SLEEP_MODE_PWR_DOWN
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#endif
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#ifndef SLEEP_DURATION_BITS
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#define SLEEP_DURATION_BITS (_BV(WDP0) | _BV(WDP3)) // 8s
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#endif
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// define sleep mode
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// disable analog comparator 0 and 1
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// disable SPI
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// unlock Watchdog configuration register
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// enable the WD interrupt, set watchdog timeout prescaler value (interrupt period)
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// unlock clock configuration change
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// change clock prescaler to 8
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#define sleep_setup() \
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set_sleep_mode(SLEEPMODE); \
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ACSR0A |= _BV(ACD0); \
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ACSR1A |= _BV(ACD1); \
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CCP = 0xD8; \
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WDTCSR = _BV(WDIE) | SLEEP_DURATION_BITS; \
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CLKPR = (_BV(CLKPS0) | _BV(CLKPS1));
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// go into sleep mode
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// disable ADC
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// wait a little for the last serial out (if any) to flush
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// disable SPI
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// set all bits in power reduction register to one (shutdown everything)
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// actually sleep
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// wake up after WDT timeout
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// wait a little
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// re-enable SPI
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#define sleep_enter() \
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adc_disable(); \
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delay(10); \
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SPCR &= ~_BV(SPE); \
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PRR = 0xFF; \
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sleep_mode(); \
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PRR = 0x00; \
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delay(10); \
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SPCR = (1<<SPE)
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// go into sleep mode, keep SPI running
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// disable ADC
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// wait a little for the last serial out (if any) to flush
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// set all bits in power reduction register to one (shutdown everything)
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// actually sleep
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// wake up after WDT timeout
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// wait a little
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#define sleep_enter_keep_spi() \
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adc_disable(); \
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delay(10); \
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PRR = 0xFF; \
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sleep_mode(); \
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PRR = 0x00; \
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delay(10);
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// nothing extra to do on wake up, just wake up
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#define sleep_vect() ISR(WDT_vect){}
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#endif
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